Data writing and reading methods for flash memories and circuitry thereof
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United States of America Patent
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May 17, 2005
Grant Date -
May 6, 2004
app pub date -
Sep 2, 2003
filing date -
Nov 6, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Data writing and reading methods and the implementation circuitry is revealed, in which two flash memories are connected to a data bus in parallel, and two data writing or reading signal lines are respectively electrically connected to each flash memory. The data writing or reading timings of flash memories are controlled by two non-overlapping data writing or reading signals, which may differ from each other by 180°, thereby data can be written into or read from the flash memory so as to increase the data writing and reading efficiencies.
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