VLIW processor and method therefor
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United States of America Patent
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May 10, 2005
Issued Date -
N/A
app pub date -
Apr 9, 1998
filing date -
Nov 5, 1993
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computing system as described in which individual instructions are executable in parallel by processing pipelines, and instructions to be executed in parallel by different pipelines are supplied to the pipelines simultaneously. The system includes storage for storing an arbitrary number of the instructions to be executed. The instructions to be executed are tagged with pipeline identification tags indicative of the pipeline to which they should be dispatched. The pipeline identification tags are supplied to a system which controls a crossbar switch, enabling the tags to be used to control the switch and supply the appropriate instructions simultaneously to the differing pipelines.
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