Chip scale surface mount package for semiconductor device and process of fabricating the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6876061
APP PUB NO 20020185710A1
SERIAL NO

10157584

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Abstract

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A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate). Since no wire bonds are required, the resulting package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

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Patent Owner(s)

Patent OwnerAddress
VISHAY INTERTECHNOLOGY INCMALVERN PA 19355-2143

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ho, Yueh-Se Sunnyvale, CA 113 2197
Kasem, Y Mohammed Santa Clara, CA 23 601
Zandman, Felix Bala Cynwyd, PA 19 440

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