Fabrication process for bonded wafer precision layer thickness control and its non-destructive measurement method
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United States of America Patent
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Mar 8, 2005
Grant Date -
Dec 4, 2003
app pub date -
May 28, 2002
filing date -
May 28, 2002
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Abstract
A measurement method for the thinned thickness of the silicon wafer, wherein thickness inspection patterns are fabricated onto the silicon wafer substrate by anisotropic etching, and then the wafer is polished with a polisher; thus a wafer with desired thickness can be obtained after the polish is proceeded; the thickness of the upper wafer is determined by the said inspection patterns, then the wafer is sorted by thickness; thus it can be applied to the MEMS micromachined devices that in need of the wafer with such precise thickness.
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