Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 8, 2005
Grant Date -
Jun 24, 2004
app pub date -
Dec 8, 2003
filing date -
Aug 24, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Methods are disclosed for selective deposition on desired materials. In particular, barrier materials are selectively formed on insulating surfaces, as compared to conductive surfaces. In the context of contact formation and trench fill, particularly damascene and dual damascene metallization, the method advantageously lines insulating surfaces with a barrier material. The selective formation allows the deposition to be 'bottomless,' thus leaving the conductive material at a via bottom exposed for direct metal-to-metal contact when further conductive material is deposited into the opening after barrier formation on the insulating surfaces. Desirably, the selective deposition is accomplished by atomic layer deposition (ALD), resulting in highly conformal coverage of the insulating sidewalls in the opening.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully