Method of manufacturing semiconductor device and flash memory

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United States of America Patent

PATENT NO 6841487
SERIAL NO

10235661

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Abstract

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A semiconductor manufacturing method is mainly contemplated, improved to prevent an altered surface layer of a resist from being removed when a single patterned resist is used to provide dry-etch and wet-etch successively. On a semiconductor substrate an insulation film and a conductive layer are formed successively. On the conductive layer a patterned resist is formed. With the patterned resist used as a mask, the conductive layer is dry-etched. A surface layer of the patterned resist is partially removed. With the patterned resist used as a mask, the insulation film is wet-etched.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION2-24 TOYOSU 3-CHOME KOTO-KU TOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shimizu, Shu Hyogo, JP 20 151
Tanaka, Tamotsu Hyogo, JP 10 88
Yano, Takashi Hyogo, JP 298 5728
Yuzuriha, Kojiro Hyogo, JP 12 100

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