Method and apparatus for performing baking treatment to semiconductor wafer
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United States of America Patent
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Jan 4, 2005
Grant Date -
Mar 27, 2003
app pub date -
Jul 18, 2002
filing date -
Sep 25, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
An apparatus for baking a semiconductor wafer having a resist pattern thereon includes a baking oven in which the semiconductor wafer is placed and heated, and a first hot plate which is provided in the baking oven to heat an entire bottom surface of the semiconductor wafer. The apparatus also includes a gas supply unit having a gas introducing path, through which the purge gas is introduced into the baking oven, and a gas exhaust path, through which the purge gas is exhausted out of the baking oven. A gas temperature controller controls a temperature of the purge gas in order that the purge gas flowing around a peripheral edge or outer portion of the wafer has a higher temperature than that around the center or inner portion of the wafer.
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