Input buffer circuit having equal duty cycle
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United States of America Patent
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Nov 16, 2004
Grant Date -
N/A
app pub date -
Mar 13, 2003
filing date -
Mar 13, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the input voltage and causes the pull-up circuit to quickly drive an output voltage to logic high. The second differential circuit detects falling edges of the input voltage and causes the pull-down circuit to quickly drive the output voltage to logic low.
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