Dielectrically separated wafer and method of the same
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United States of America Patent
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Nov 9, 2004
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N/A
app pub date -
Oct 18, 1999
filing date -
Oct 29, 1998
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Abstract
A dielectrically separated wafer and a fabrication method of the same are provided according to the first, second and third embodiments of the present invention. According to the first embodiment, it becomes possible to expand the device fabrication surface area of the dielectrically separated silicon islands by laminating a low concentration impurity layer including a dopant of the same conductivity on a high concentration impurity layer formed on the bottom of the island. According to the second embodiment, a dielectrically separated wafer and a fabrication method for the same which can grow a polysilicon layer without producing voids in the dielectrically separating oxide layer is provided by forming a seed polysilicon layer at low temperature and under low pressure and by forming, on the seed polysilicon layer, a high temperature polysilicon layer 16. According to the third embodiment, a dielectrically separated wafer and a fabrication method for the same is provided in which the surface between dielectrically separated islands is flattened by polishing the surface of the dielectrically separated wafer only the amount needed for the surface of a dielectrically separated wafer to become a flat surface between dielectrically separated silicon islands 10A, without projections or indentations.
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