Method and apparatus for transferring vector data between memory and a register file

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United States of America Patent

PATENT NO 6813701
SERIAL NO

09375328

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Abstract

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A compiler and vector data transfer instructions for use in a vector transfer unit for handling transfers of vector data between a memory and a data processor in a computer system. The compiler identifies the use of vector data in an application program and implements one or more vector instructions for transferring the vector data between memory and registers used to perform calculations on the vector data. A vector is partitioned by the compiler into variable-sized streams which are transferred into and out of the processor as burst transactions. The compiler schedules transfers of vector streams required in a calculation so that calculations on a portion of the vector data are performed while a subsequent portion of the vector data is transferred. A vector buffer pool is partitioned into one or more vector buffers and each vector buffer is used at a specific time. The compiler partitions a vector buffer into the variable-sized streams depending on the number of vectors buffers required by an application program and the size required for each stream. Each vector buffer is allocated for exclusive use by an application program that is executing in the data processor. A synchronization instruction is used to allow all VTU instructions issued prior to the synchronization instruction to finish before any VTU instructions issued after the synchronization instruction may begin. Instructions for controlling access to the vector buffer pool are also included.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS AMERICA INC1001 MURPHY RANCH ROAD MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ansari, Ahmad R San Jose, CA 66 805

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