Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device
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United States of America Patent
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Oct 19, 2004
Grant Date -
May 23, 2002
app pub date -
Dec 14, 2001
filing date -
Jul 28, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.multidot.FETs.
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