Test pattern generation circuit and method for use with self-diagnostic circuit
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United States of America Patent
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Oct 5, 2004
Grant Date -
Jan 23, 2003
app pub date -
Jan 31, 2002
filing date -
Jul 17, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A test pattern generation circuit for use with a self-diagnostic circuit which produces a test pattern through use of a microinstruction code, which includes a memory device RAM/ROM which temporarily stores the microinstruction code and outputs two different instruction codes within one clock cycle; a selector SEL which receives output from the memory device and selectively delays the two instruction codes, thereby outputting one code; and a pattern generation circuit PG which produces a test pattern corresponding to output from the selector.
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