Memory interface for reading/writing data from/to a memory
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United States of America Patent
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Sep 28, 2004
Issued Date -
N/A
app pub date -
Dec 16, 1997
filing date -
Jun 24, 1993
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A memory interface for connecting a bus to memory comprises an input, a buffer, an address input, a generator, and a writer. The input receives a plurality of data words from the bus. The buffer buffers the data words received from the bus. The address input receives from the bus addresses associated with the plurality of data words. The generator generates a series of addresses in the memory into which the buffered data words may be written. The series of addresses are derived from the received addresses. The writer writes the buffered data words into the memory at the generated addresses.
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