Fabrication method of semiconductor integrated circuit device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6797542
APP PUB NO 20030153130A1
SERIAL NO

10364503

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Abstract

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At the time of performing resin molding for a matrix frame in the fabrication of semiconductor integrated circuit devices, a predetermined amount of air is fed into each of first cavities in a first row and second cavities in a second row, the first and second cavities being formed in a matrix arrangement in a lower mold of a molding die, so as to pressurize the interiors of the cavities, and a sealing resin is charged into the cavities, while the pressure therein is regulated in such a manner that the charging speeds of the sealing resin become equal in all of the cavities, whereby it is possible to stabilize the quality of the product being obtained.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Imura, Kenichi Higashiyamato, JP 15 201
Kuratomi, Bunshi Kodaira, JP 17 128
Murakami, Fumio Kodaira, JP 10 53
Namiki, Katsushige Ome, JP 2 14
Shimizu, Fukumi Tachikawa, JP 20 134

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