Method of making a power semiconductor device
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United States of America Patent
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Sep 21, 2004
Issued Date -
N/A
app pub date -
Apr 16, 2003
filing date -
Dec 31, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A first layer of polysilicon having a second dopant of the second conductivity type is deposited in the trench. The second dopant is diffused to form a doped epitaxial region adjacent to the trench and in the epitaxial layer. A second layer of polysilicon having a first dopant of the first conductivity type is subsequently deposited in the trench. The first and second dopants respectively located in the second and first layers of polysilicon are interdiffused to achieve electrical compensation in the first and second layers of polysilicon. Finally, at least one region of the second conductivity type is formed over the voltage sustaining region to define a junction therebetween.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
GENERAL SEMICONDUCTOR INC | 10 MELVILLE PARK ROAD MELVILLE NY 11747 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Blanchard, Richard A | Los Altos, CA | 334 | 6868 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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