Method and system for operating a combination unified memory and graphics controller
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United States of America Patent
Stats
-
Sep 14, 2004
Grant Date -
Mar 21, 2002
app pub date -
Sep 18, 2001
filing date -
Sep 18, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A display-based system is disclosed with a processing unit, a memory control facility, and a graphics display controller interfacing to a display facility. Collectively these modules are interconnected by a bus facility to an external memory facility. The graphics display controller has a first mode providing a video image signal to the display facility. In particular, a detector is provided for detecting display stabilization. An output of the graphics display controller is being coupled to a frame grabber. The frame grabber is arranged to execute a writeback-to-memory storage of the video image signal into a writeback image memory during a subsequent videoframe, and subsequently signaling the graphics display controller to switch over to a second mode, in which the stored writeback video image signal is supplied to the display facility. The average data traffic on the bus facility is thus reduced.
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