Call processor system and methods
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United States of America Patent
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Aug 31, 2004
Grant Date -
N/A
app pub date -
Aug 31, 2000
filing date -
Aug 31, 1999
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Abstract
A system for implementing a high-availability architecture comprising a first compact Peripheral Component Interconnect shelf, a second compact Peripheral Component Interconnect shelf, and a network. The first and second compact peripheral component interconnect shelf are redundant systems. The first compact peripheral component interconnect shelf comprises a first system utility card connected to a first compact core to network interface connected to a first compute platform connected to a first high speed pipe interface. The second compact peripheral component interconnect shelf comprises a second system utility card connected to a second compact core to network interface connected to a second compute platform connected to a second high speed pipe interface. The first and second compact peripheral component interconnect shelf are connected via Ethernet. The first and second compact core to network interface is connected to the network.
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