Refresh control circuitry for refreshing storage data
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United States of America Patent
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Jul 20, 2004
Grant Date -
May 1, 2003
app pub date -
Aug 2, 2002
filing date -
Oct 29, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A refresh array activating signal is activated in accordance with a refresh request and specific address bit(s) of a refresh address. Specific lower bit(s) of a refresh address counter is (are) utilized as the specific address bit(s) of the refresh address, and the specific address bit(s) is (are) utilized as upper bit(s) of the refresh address. Thus, in the self-refresh mode, refresh can be performed for a prescribed address region at uniform intervals, with a lengthened refresh interval, consuming less current. A semiconductor memory device is provided which allows current consumption to be distributed on a time basis and to be reduce in a self-refresh mode is provided.
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