Method of preventing cracking in optical quality silica layers

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United States of America Patent

PATENT NO 6749893
APP PUB NO 20030143334A1
SERIAL NO

10059117

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Abstract

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A method for making an integrated photonic device involves depositing buffer, core and cladding layers on the front side of a wafer. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above 600.degree. C. on the cladding layer to prevent the cracking of the layers as a result of the thermal treatment.

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Patent Owner(s)

Patent OwnerAddress
TELEDYNE DALSA SEMICONDUCTOR INCWATERLOO ON N2V 2E9

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Archambault, Sylvie Rock Forest, CA 2 42
Lachance, Jonathan Granby, CA 6 27
Ouellet, Luc Granby, CA 68 2204

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