Scan stream sequencing for testing integrated circuits

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United States of America Patent

PATENT NO 6748564
SERIAL NO

09696102

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A system and method for processing scan data for integrated circuit testing. Scan data is divided into three groups of scan data segments: scan-in data segments, scan-out data segments and scan-mask data segments. The sequence of scan data segments in each group constitutes the operative test data in a scan stream. Each scan stream is represented by a table having a row corresponding to each scan data segment in the stream. Each row has four fields: a start address, a segment length, a start pad length and an end pad length. The start address is a pointer to the scan data segment in memory where the scan data segment is stored in a contiguous portion of memory. Scan data segment length is the length in bits of the segment. Start pad length is a delay value measured in number of scan clock cycles that must elapse before processing the respective segment in the scan stream. End pad length is a delay value measured in number of scan clock cycles that must elapse before processing the next start pad length and scan data segment in the scan stream. Scan streams consist of the bit sequence of segment data interposed by dummy data corresponding in length to the start pad and end pad lengths. Scan streams are interleaved by using the pad lengths to time the processing of scan data segments.

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Patent Owner(s)

Patent OwnerAddress
DEUTSCHE BANK AG NEW YORK BRANCH AS COLLATERAL AGENT60 WALL STREET NEW YORK NY 10005

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cullen, Jamie S San Jose, CA 6 62
West, Burnell G Fremont, CA 39 816

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