Wafer holder for backside viewing, frontside probing on automated wafer probe stations
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United States of America Patent
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Jun 8, 2004
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N/A
app pub date -
Jun 21, 2001
filing date -
Jun 21, 2001
priority date (Note) -
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Abstract
An integrated circuit test apparatus and a method for testing an integrated circuit are described. The integrated circuit test apparatus includes a holder adapted to receive a wafer, where a frontside of the wafer is accessible to be probe tested by electrically conducting probe needles during which a backside of the wafer is accessible to be scanned by an optical scanning mechanism. The scanning mechanism can optically detect photoemission-generated defects resulting from electrical stimuli applied to the integrated circuits via the probe needles. The holder is coupled to a three-dimensional translational mechanism that will allow for automated multi-die test probing.
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