ESD protection circuit with self-triggered technique
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United States of America Patent
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Jun 1, 2004
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N/A
app pub date -
Dec 23, 2002
filing date -
Dec 23, 2002
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Abstract
An electrostatic discharge protection circuit. The electrostatic discharge protection circuit utilizes the non-uniform triggering of multi-finger gate-grounded NMOS. The source of the finger which has the potential to trigger on is coupled to the base terminal of all the parasitic bipolar transistor of all the other multi-finger gate-ground NMOS structures. Thus, the finger which has the potential to be triggered can be used as a triggering device to trigger the other finger devices during an ESD event. By using this method, the ESD protection NMOS or PMOS, realized with multi-finger layout structure, can be uniformally triggered on to discharge ESD current. Therefore, it can have a high ESD robustness in a small layout area.
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