Method for forming dual damascene line structure
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United States of America Patent
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-
Jun 1, 2004
Grant Date -
Jan 2, 2003
app pub date -
Feb 5, 2002
filing date -
Jun 27, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for forming a dual damascene line structure includes forming an inter-metal dielectric including a first region and a second region on a semiconductor substrate, forming a first hard mask material layer on an entire surface of the inter-metal dielectric, removing the first hard mask material layer on the first region, forming a second hard mask material layer on an entire surface of the inter-metal dielectric, forming a hard mask to remove a portion of the first hard mask material layer on the second region, etching the inter-metal dielectric of the first region to a first thickness using the hard mask, exposing the inter-metal dielectric of the second region, and etching the exposed inter-metal dielectric to simultaneously form a via hole and a trench having the via hole.
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