Metal layer in semiconductor device including a planar stuffed layer and an insulating film with a projection and method for fabricating the same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 13, 2004
Grant Date -
Apr 25, 2002
app pub date -
Nov 15, 2001
filing date -
Dec 30, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Metal layer in a semiconductor device and method for fabricating the same, the semiconductor device having a transistor and a capacitor electrode formed on a region of a semiconductor substrate, the metal layer including a planar protection film on an entire surface of the semiconductor substrate inclusive of the transistor and the capacitor electrode, an absorber layer over the planar protection film inclusive of a region over the transistor, an insulating film on an entire surface, with a width of projection in a relievo form in a region over the absorber layer, a via hole through the planar protection film and the insulating layer, to expose a region of the capacitor electrode, a tungsten plug and a planar stuffed layer in the via hole, a mirror metal layer on the insulating film on both sides of the projection of a relievo form of the insulating film, inclusive of the planar stuffed layer, and an insulating film spacer on the projection of a relievo form of the insulating film and the mirror metal layer in the vicinity of the projection, whereby improving a light transmission ratio and enhancing an optical contrast.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully