Binary adder
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United States of America Patent
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Mar 23, 2004
Grant Date -
N/A
app pub date -
Jun 5, 2000
filing date -
Dec 15, 1997
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Abstract
The present invention relates to an apparatus for determining the sum of first and second optical binary words. The apparatus uses a first optical logic gate and a second optical logic gate to generate respective first and second combination words which represent a logical combination of the binary words applied to the respective logic gates. The first and second combination words are then offset by one bit slot with respect to each other by an offsetting device to generate first and second offset combination words. These offset combination words are repeatedly fed back to the first and second logic gates. The binary sum of the original two words is given by the first combination word when each bit slot of the second combination words has the same logical state.
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