Wafer chuck, exposure system, and method of manufacturing semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6664549
APP PUB NO 20030001103A1
SERIAL NO

10182389

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Abstract

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In a wafer chuck for flatly vacuum-chucking a semiconductor wafer (11) supported by support pins (15) such that a pressure in a suction chamber (13) surrounded by an external wall (12), the upper surface of the external wall (12) is formed to be lower than the upper surfaces of the support pins, and the upper surface of the external wall (12) does not pressure the semiconductor wafer (11), a distance (L1) between the external wall (12) and closest support pins (15a) is up to 1.8 mm, and an alignment pitch. (L2) of the support pins (15) aligned inside the closest support pins (15a) to the external wall (12) is not more than 1.5 times of the distance (L1) between the external wall (12) and the closest support pins (15a).

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Patent Owner(s)

Patent OwnerAddress
HITACHI TOKYO ELECTRONICS CO LTDOME-SHI TOKYO 198-8532

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Honda, Teruo Ome, JP 2 46
Kobayashi, Seiichiro Ome, JP 19 145
Koyanagi, Koichi Ome, JP 1 32
Motohashi, Masaharu Ome, JP 1 32
Saeki, Hideo Ome, JP 9 95

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