Circuit for generating power-up signal
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United States of America Patent
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Dec 2, 2003
Grant Date -
Feb 27, 2003
app pub date -
Dec 28, 2001
filing date -
Aug 24, 2001
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A circuit for generating a power-up signal in a semiconductor memory device which can remove instability due to non-generation of a back bias voltage by detecting the back bias voltage of a memory cell internally generated when an external power voltage is applied, and detecting the external power voltage when the back bias voltage reaches a predetermined level, and which can improve the stability of the power-up signal by initializing an external power voltage detecting unit by using an initial start-up circuit.
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