Method for reducing EMI and IR-drop in digital synchronous circuits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6647540
APP PUB NO 20030088835A1
SERIAL NO

10035398

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method for designing a synchronous digital circuit that exploits clock skew so as to reduce EMI and IR-drop. The circuit has a plurality of storage elements connected to combinational logic blocks, each of the storage elements being driven by a clock signal distributed from a clock device; and the method involves substantially maximizing the clock skew in the circuit subject to one or more constraints on the design of the circuit.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
UNWIRED PLANET LLC170 SOUTH VIRGINIA STREET SUITE 201 RENO NV 89501

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lindkvist, Hans Lund, SE 4 21
Svensson, Lars Goteborg, SE 37 338

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation