Method of manufacturing semiconductor devices having capacitors with electrode including hemispherical grains

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United States of America Patent

PATENT NO 6632721
SERIAL NO

09602887

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Abstract

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In a method of manufacturing a semiconductor integrated circuit device in which a lower electrode of a capacitor is composed of a polycrystalline silicon film having a surface area increased by surface roughening, an impurity is introduced into the polycrystalline silicon film by vapor phase diffusion in order to reduce the resistance of the lower electrode.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION2-24 TOYOSU 3-CHOME KOTO-KU TOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujisaki, Yoshihisa Hachiouji, JP 41 763
Iijima, Shinpei Akishima, JP 42 669
Kuroda, Jun Fussa, JP 63 343
Miki, Hiroshi Tokyo, JP 72 1472
Yamaguchi, Kenichi Ome, JP 69 434
Yamamoto, Satoshi Ome, JP 514 4290
Yoshida, Tadanori Sayama, JP 20 208

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