Data and clock extractor with improved linearity
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United States of America Patent
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Sep 30, 2003
Grant Date -
Jun 26, 2003
app pub date -
Dec 20, 2001
filing date -
Dec 20, 2001
priority date (Note) -
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Abstract
Phase-locked-loop based data and clock extraction comprising a phase detector that generates up and down pulses. Down pulses are maintained in width approximately equal to 1.5 unit intervals of a local sampling clock. Up pulses are allowed to vary with the phase relationship between the local sampling clock and an incoming encoded bit stream. The up pulses are allowed to vary between 1 and 2 unit intervals of the local sampling clock. The up and down pulses drive a charge pump D/A converter that generates a control voltage. The control voltage sets the frequency of the local sampling clock generated by a voltage controlled oscillator. Shift register controlled by a state machine and clocked by the local clock allows reception of complex data packets arriving by the encoded bit stream.
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