Process of manufacturing electron microscopic sample and process of analyzing semiconductor device
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United States of America Patent
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Jul 15, 2003
Grant Date -
Sep 26, 2002
app pub date -
Mar 11, 2002
filing date -
Mar 14, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A process of manufacturing an electron microscopic sample comprising the steps of: (a) forming a mask layer for covering an object region to be analyzed of a semiconductor layer and/or a conductive layer which have/has been patterned into a desired configuration; (b) reducing a periphery region surrounded the object region to be analyzed in a depth direction by using the mask layer; (c) removing the mask layer and forming an etch stop layer over the object region to be analyzed and the periphery region; and (d) polishing the semiconductor layer and/or the conductive layer in the object region to be analyzed down to the level of the surface of etch stop layer lying on the reduced periphery region.
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