Adaptation of standard microprocessor architectures via an interface to a configurable subsystem
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United States of America Patent
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Jun 24, 2003
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N/A
app pub date -
Nov 19, 1999
filing date -
Nov 19, 1998
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Abstract
A system for extending standard processors using either undefined op-codes or sparse address spaces to maintain the use of legacy processor tools and reduce the complexity of the design process. The disclosure describes a method and apparatus for adding circuitry to processing units that allows partitioning of the design into a fixed processing unit derivative and a configurable subsystem. The legacy processor unit language tools work with the fixed processing unit derivative while the logic design tools work well with the configurable subsystem. In one embodiment, the configurable subsystem is implemented with easily available programmable Logic Devices (PLD's and FPGA's).
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