Semiconductor integrated circuit device and method of manufacturing the same
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United States of America Patent
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Jun 10, 2003
Grant Date -
N/A
app pub date -
Aug 16, 2000
filing date -
Aug 18, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
In forming a plug 21 of a polycrystalline silicon film in a contact hole 19 to which a bit line BL is connected, the upper surface of the plug 21 is retracted downward from the upper edge of the contact hole 19, and a plug 22 of a laminate of a TiN film 26 and a W film 27 is formed on the plug 21. Then, the W film deposited on the contact hole 19 is patterned to form a bit line BL having a width narrower than the diameter of the contact hole 19. Here, the W film 27 constituting part of the plug 22 in the contact hole 19 is etched, but the TiN film 26 constituting another part of the plug 22 is not almost etched.
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