Enhanced EPROM structures with accentuated hot electron generation regions
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United States of America Patent
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May 20, 2003
Grant Date -
N/A
app pub date -
Dec 20, 2001
filing date -
Dec 20, 2001
priority date (Note) -
Expired
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Abstract
An EPROM structure includes a NMOS transistor integrated with a capacitor. The terminal names of the NMOS transistor follow the conventional nomenclature: drain, source, body and gate. The gate of the NMOS transistor is connected directly and exclusively to one of the capacitor plates. In this configuration, the gate is now referred to as the 'floating gate'. The remaining side of the capacitor is referred to as the 'control gate'.
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