Computer instruction compression
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United States of America Patent
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May 13, 2003
Grant Date -
N/A
app pub date -
Jun 7, 1995
filing date -
Jun 21, 1994
priority date (Note) -
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Abstract
A computer system has compact instructions avoiding the need for redundant bit locations and needing simple decoding. Logic circuitry is arranged to respond to an instruction set comprising a plurality of selectable instructions of different bit lengths. Each instruction is based on a format of predetermined bit length and a predetermined sequence of instruction fields each of a respective predetermined bit length. Some instructions omit a selected one of the fields and include an identifier of less bit length than the omitted field to indicate which field is omitted. Thus this bit length of the instruction is compressed. The logic circuitry is operable to restore the omitted field on execution of the instruction.
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