Method and apparatus for failsafing and extending range for write precompensation

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United States of America Patent

PATENT NO 6563655
SERIAL NO

08650850

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Catastrophic failures of a write precompensation circuit are prevented from occurring without limiting the precompensation range to a small value and the range of precompensation is extended beyond limits imposed by the duty cycle of the clock signal. Catastrophic failure of the write precompensation circuit is prevented by ORing either the input or the output of the comparator and the opposite phase of the clock. The 180 degree delayed clock forces any transitions that would otherwise have been missed. The range of a write precompensation circuit is extended by ORing the clock and the clock delayed by a time td. The extended duty cycle that results is used to generate a longer precompensation delay. A technique is also provided to maintain constant duty cycle over a broad range of data rates.

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Patent Owner(s)

Patent OwnerAddress
SILICON SYSTEMS INCSUITE 220 2460 N FIRST STREET SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukahori, Kiyoshi Tsukuda Chuo Ku, JP 14 145
Ohtsu, Tomoaki Yokohama, JP 2 21
Yamasaki, Richard G Torrance, CA 14 237

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