Method for the comparison of electrical circuits
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United States of America Patent
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Apr 29, 2003
Grant Date -
N/A
app pub date -
Sep 27, 2000
filing date -
Mar 30, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Various phases of the circuit design are specified in different notations, whereby each notation is based on the same circuit. Since the notations arise successively during the circuit design, whereby the circuit design covers a considerable time span, it should also be assured that a first change in a notation of an early phase corresponds to a second change in a notation of a later phase. For that purpose, the circuits underlying the notations are formally compared. Each notation describes the circuit as a boolean finite automaton, whereby a comparison of two automatons is implemented in that their input variables, output variables and operands are compared to one another. An allocation of operands corresponding to one another is determined on the basis of a status dependency graph, whereby a resolution with operands of the automatons is refined such that, preferably, corresponding allocations of operands of the automatons result. A coarsening method assures that no resolutions arise that make an allocation impossible.
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