Methods and apparatus for reducing drift due to averaging in reduced resolution video decoders

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United States of America Patent

PATENT NO 6539058
SERIAL NO

09059069

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Abstract

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Methods and apparatus for simulating, in reduced resolution video decoders, the biasing effect associated with MPEG's specified rounding of pixel values including a fractional component of 0.5 to the next highest integer value are described. In one embodiment, the biasing effect is simulated by generating luminance and chrominance DC DCT coefficient bias values from, e.g., motion vector offset data. The DC DCT bias values are then added to the DC DCT coefficients of the luminance and chrominance blocks, respectively, which correspond to the same image block to which the motion vector data used to generate the bias values corresponds. In another embodiment, pixel values are directly adjusted to simulate the biasing effect associated with MPEG compliant rounding. In such an embodiment, luminance and chrominance pixel biasing values are generated as a function of, e.g., motion vector offset information. The bias values are added to the pixel values generated through the use of motion compensated prediction. The pixel values are then rounded by performing a non-biased rounding operation to generate integer pixel values.

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Patent Owner(s)

Patent OwnerAddress
HITACHI AMERICA LTD2535 AUGUSTINE DRIVE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lane, Frank A Medford Lakes, NJ 71 4139
Pearlstein, Larry Newton, PA 53 1507
Sazzad, Sharif M Monmouth Junction, NJ 9 173

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