High speed semiconductor memory device with short word line switching time
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United States of America Patent
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Mar 25, 2003
Grant Date -
Jul 11, 2002
app pub date -
Jan 3, 2002
filing date -
Sep 30, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Setting means (such as fuse circuits) for adjusting the timings of various signals such as an activation timing of a sense amplifier, a fall timing of a word line, a recovery operation (equalization) of a bit lines and so forth, checking an operation in a test stage of a chip, and permanently programming (fixing) the timing of an internal signal to the condition of the highest operation speed that can be confirmed as acquirable in this check stage, is provided.
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