Single damascene method for RF IC passive component integration in copper interconnect process
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United States of America Patent
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Mar 18, 2003
Grant Date -
Dec 26, 2002
app pub date -
Jun 7, 2001
filing date -
Jun 7, 2001
priority date (Note) -
Expired
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Abstract
A method of integrated circuit component integration in copper interconnects, including the following steps of the first embodiment. A wafer is provided having an exposed top-most planar copper interconnect. The wafer being divided into one or more areas selected from the group consisting of: a spiral inductor area having an exposed planar copper interconnect bottom half of a stacked spiral inductor; a MIM capacitor area having an exposed planar copper interconnect bottom plate and an exposed planar copper interconnect contact point of a MIM capacitor; and a precision resistor area having a two exposed planar copper interconnect routing points of a precision resistor. A spiral inductor is formed within the spiral inductor area; a MIM capacitor is formed within the MIM capacitor area; and a precision resistor is formed within the precision resistor area.
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