Secure cache for instruction and data protection
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United States of America Patent
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Feb 18, 2003
Grant Date -
N/A
app pub date -
Jun 29, 1998
filing date -
Jun 29, 1998
priority date (Note) -
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Abstract
A computing system, includes a processor, a cache, a memory system, and a secure cache controller system. The cache stores a plurality of cache lines. The memory system stores a plurality of blocks of encrypted data. The secure cache controller system is situated between the memory system and the cache. When there is a miss of a first cache line of data in the cache and the first cache line of data resides in a first block of encrypted data within the memory system, the secure cache controller system fetches the first block of encrypted data, decrypts the first block of encrypted data and forwards the first cache line to the cache.
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