Method of fabricating thin film transistor

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United States of America Patent

PATENT NO 6511871
SERIAL NO

09794770

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Abstract

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The present invention relates to a method of fabricating a thin film transistor in which a metal silicide line generated from Metal Induced Lateral Crystallization is located at the outside of a channel region. The present invention includes the steps of forming a semiconductor layer on a substrate wherein the semiconductor layer has a first region, a channel region and a second region in order, forming a gate insulating layer/a gate electrode on the channel region, doping the first and the second region heavily with impurity, forming a metal film pattern making the first region a metal-offset, and crystallizing the semiconductor layer by means of applying thermal treatment to the semiconductor layer having the metal film.

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Patent Owner(s)

Patent OwnerAddress
NEOPOLY INCMAIL STOP 131-309 SEOUL NATIONAL UNIVERSITY SHINLIM 9-DONG GWANNAK-GU SEOUL 151-744

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Joo, Seung-Ki Seoul, KR 13 84
Kim, Tae-Kyung Kyongki-do, KR 152 1053

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