Receiving circuit and method for a controlled area network system
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United States of America Patent
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Dec 10, 2002
Grant Date -
N/A
app pub date -
Nov 13, 1998
filing date -
Nov 13, 1997
priority date (Note) -
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Abstract
A receiving circuit is described for a CAN (Controlled Area Network) system with digital data transfer via a bus with parallel, redundant pulse signal transfer via two fines. The receiving circuit includes a comparator circuit assembly for differential evaluation of the two pulse signals received via the two lines, with an offset voltage being superimposed on the pulse signal received via one of the two lines prior to said differential evaluation. The comparator circuit assembly superimposes both a positive offset voltage and a negative offset voltage. A bistable multivibrator circuit is connected between the output side of the comparator circuit assembly and the output of the receiving circuit.
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