Serial data communication bus system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Dec 3, 2002
Grant Date -
N/A
app pub date -
Apr 15, 1999
filing date -
Apr 18, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A deterministic bus control (as shown in FIG. 2) comprises a conventional CAN integrated circuit bus controller, a transmit request buffer for storing transmit requests and a deterministic scheduler which detects the status of the bus and controls the release of stored transmit requests to the controller in accordance with a deterministic protocol (e.g. the ARINC 629 system protocol).
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