Address memory structure and method for processing network node addresses in the Ethernet switch
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 3, 2002
Grant Date -
N/A
app pub date -
Jun 5, 1998
filing date -
Mar 20, 1998
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An address memory structure used in an Ethernet switch, comprising an index memory and an address table memory is disclosed. The index memory is used for storing the vendor code section and the address table memory is used for storing the serial code section. The vendor code index data connects the index memory data to the address table memory data. When comparing the node addresses, the serial code section in the address table memory is compared first. If there is a consistent entry, the corresponding vendor code section is compared through the vendor code index data. When adding a new node address, the corresponding vendor code index data is attained, and the vendor code index data and the serial code of the node address are then written into the address table memory.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully