Leaded semiconductor packages and method of trimming and singulating such packages
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United States of America Patent
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Nov 19, 2002
Grant Date -
N/A
app pub date -
Nov 2, 2000
filing date -
Oct 9, 2000
priority date (Note) -
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Abstract
Leaded semiconductor packages and a method (80) of trimming and singulating such packages are described. The method (80) uses a panel (10) with lead frames (22) arrayed in a plurality of frame strips (24) for mounting a plurality of semiconductor dies (36). The panel (10) has a peripheral frame (26), a plurality of dam bars (28) disposed within the peripheral frame (26), a plurality of leads (30) extending transversely from portions of the plurality of dam bars (28) and a plurality of support bars (32) extending transversely from other portions of the plurality of dam bars (28). Primary tie bars (34) are formed at opposite ends of each of the plurality of frame strips (24). Slots (44) are disposed between lateral sides of the peripheral frame (26) and the plurality of frame strips (24).
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