Tester, a test system, and a testing method for a semiconductor integrated circuit
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United States of America Patent
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Nov 12, 2002
Grant Date -
N/A
app pub date -
Aug 25, 2000
filing date -
Mar 1, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An input signal for testing a device is stored in a first storage located on a test board. An expectation value signal output by the device, when it operates normally, in response to the input signal is stored in a second storage located on the same test board. The input signal from the first storage is supplied to the device based on an instruction from a tester body. The device outputs an output signal in response to input of this input signal. This signal is sent to a comparator. The comparator compares the signal output from the device with the expectation value signal stored in and output from the second storage.
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