Circuit and method for input to failsafe "AND" gate
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United States of America Patent
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-
Oct 8, 2002
Grant Date -
Dec 6, 2001
app pub date -
Dec 28, 2000
filing date -
Dec 30, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for generating signals for input to a vital 'AND' gate includes generating a plurality of independent signals for input to the 'AND' gate and checking that each of the signals has a frequency and duty cycle within predetermined ranges. Upon a determination that one of the signals exhibits an inactive state or has a frequency or duty cycle outside the predetermined ranges, generation of another of the signals is stopped. This method eliminates a need for physical filters where the input signals are generated independently by computer subsystems.
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