System and method for generating a flat mask design for projecting a circuit pattern to a spherical semiconductor device
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United States of America Patent
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Sep 17, 2002
Grant Date -
May 9, 2002
app pub date -
Jul 9, 1999
filing date -
Jul 10, 1998
priority date (Note) -
Expired
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Abstract
The present invention provides a method for segmenting and mapping a two-dimensional conventional circuit pattern to a flat mask for projection onto a three-dimensional surface. The circuit pattern is first segmented into a plurality of circuit segments enclosed in a plurality of base units of an imposed grid system. Subsequently, locations and the boundary conditions for a plurality of mask segments on the mask are determined such that no unneeded overlapping at the boundaries of the projected image on the spherical shaped semiconductor device is possible. The mask, along with a photolithography system having a plurality of mirrors, projects the circuit pattern onto the spherical shaped semiconductor device.
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