DRAM refresh timing adjustment device, system and method
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United States of America Patent
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Aug 20, 2002
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N/A
app pub date -
Jul 6, 2001
filing date -
Jul 6, 2001
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Abstract
An apparatus includes at least one dynamic random access memory (DRAM) array; and at least one temperature sensor in thermal communication with the DRAM array and operable to produce a signal indicative of a temperature of the DRAM array.
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